low level - How do memory mapped devices prevent RAM from responding to read operation? -

Assume that we have a memory map device that takes a fixed address space. The CPU tries to read something from the device, so he tries to read a certain word in place of that address. What really happens? When the memory controller answers, then both the RAM and the device are both trying to respond to the request, just because of the reason for the dispute.

There are several ways to apply it:

• Support in memory controller - e.g. Allows certain memory categories to be redirected to another controller. It is contained in the NUMA architecture - the "closest" memory controller handles a fixed address range, and all other requests are hand in hand. Somewhere-or on-on-series, you can put the circuitry to handle memory-mapped devices. It is common in microcontrollers, which usually handle on-chip RAM, prom and / or flash, along with externally attached memory.

• Hardware with Direct Memory Access (DMA) - can be provided by any controller that allows multiple devices to access the same memory. The external device just writes in the RAM that you want to read, requires an additional protocol for synchronization, but it can be supported or provided by the memory controller.

• Soft Faulting - In the virtual memory system, the soft fault, fault handler can be read from the actual value RO from a port after reaching an invalid address. This comes with a clear demonstration penalty, but for a small data set, it can be negligible compared to the actual hardware access.

Disclaimer: These are educated estimates with some information raised on the shoulders of other people, but I think about it before looking for Wikipedia):